LIVE WEBINAR:

Ways to run cocotb: makefiles, cocotb-test, or your custom setup (EU)

Philipp Wagner, cocotb and Hardware/Software Engineer at lowRISC

Thursday, November 9, 2023

3:00 PM - 4:00 PM (CET)

Abstract:

cocotb enables Python-based hardware verification, and it integrates into your simulator of choice, such as Aldec's Riviera-PRO and executes Python testbenches in that context. In this webinar, we will look at ways to invoke your simulator of choice in a way that also starts with cocotb. We will show ways to extend the setup to make it suitable for your design, and discuss trade-offs between the different approaches.

We will assume basic cocotb knowledge during this webinar. If you have never heard of cocotb, have a look at previous Aldec Webinars or other online resources for an introduction to cocotb. 

 

Agenda:
  • Running cocotb tests: your options
  • Using Makefiles to run cocotb tests
  • A closer look at cocotb runner
  • Q&A: bring your questions!
Webinar Duration
  • 45 min presentation/live demo
  • 15 min Q&A

Presenter Bio:

Simon Southwell has 35 years in Research and Development, with experience in ASIC design, FPGA, and embedded software development.

Philipp Wagner is co-maintainer of cocotb and Hardware/Software Engineer at lowRISC in Cambridge, UK, where he is involved in OpenTitan, the first Open Source Root of Trust chip. For many years Philipp has been working on the intersection of digital hardware, software and open source. He is passionate about developer productivity, communities, and bridging the gap between hardware and software development methodologies. Philipp is Founding Director of the Free and Open Source Silicon Foundation, and has received a M.Sc. and PhD (Dr.-Ing.) degree in Electrical Engineering from Technical University Munich, Germany.

 

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