LIVE WEBINAR: FPGA Design/Verification Best-Practices for Quality and Efficiency
Part 4: Code, Functional and Specification Coverage (EU)
Espen Tallaksen, CEO of EmLogic
Thursday, May 19, 2022
3:00 PM - 4:00 PM (CEST)
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Abstract:
Functional coverage is often mentioned together with constrained-random verification, and this is a great combination. However, functional coverage is also very useful even if you have no randomization at all. This is a great method for ensuring that you are in fact checking the right things in your testbench. Unfortunately, not many designers are applying functional coverage, and maybe part of the reason for that is the complexity surrounding previous solutions to this functionality. This presentation will show you how it works and how easy it is to get started with this new functionality in UVVM.
Agenda:
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Presenter Bio:
Espen Tallaksen, CEO of EmLogic
Espen is also the author and architect of UVVM and founder of previous Bitvis.
He has a strong interest in methodology cultivation and pragmatic efficiency and quality improvement, and he has given many presentations at various international conferences with great feedback. He has also given courses on FPGA Design and Verification in three different continents.