FPGA Design/Verification Best-Practices for Quality and Efficiency Part 3: Randomization

LIVE WEBINAR: FPGA Design/Verification Best-Practices for Quality and Efficiency

Part 3: Randomization – The Why, When, What & How (EU)

Espen Tallaksen, CEO of EmLogic

Thursday, May 12, 2022

3:00 PM - 4:00 PM (CEST)

Abstract:

Randomization is very important for modern verification. Still, very few designers apply randomization sufficiently in their testbenches. This means they are missing out on a very important method for finding potential bugs in their design, and as a result their products have significantly more undetected bugs. Randomization can be used in many ways, but it is of course also important to know when not to use it.

This presentation will show several levels of applying randomization, both with respect to the actual DUT and the randomization functionality available. The main principles shown are tool independent, but the new UVVM randomization functionality will be used as examples, thus also giving you a kick start using this great tool.

Agenda:

Where could randomization be applied?
Directed vs Random
Constrained Random
Advanced Randomization using various approaches
Optimized Randomization and how that works
Various examples
Great features to improve your testbench
Conclusion
Q&A

Webinar Duration:

45 min presentation/live demo
15 min Q&A

Presenter Bio:

Espen Tallaksen, CEO of EmLogic

Espen Tallaksen, CEO of EmLogic
Espen is also the author and architect of UVVM and founder of previous Bitvis.
He has a strong interest in methodology cultivation and pragmatic efficiency and quality improvement, and he has given many presentations at various international conferences with great feedback. He has also given courses on FPGA Design and Verification in three different continents.