LIVE WEBINAR: How to plan a DO-254 compliant verification process for FPGA designs (EU)
Presenter: Janusz Kitel, DO-254 Program Manager at Aldec
Thursday, October 3, 2019
3:00 PM – 4:00 PM CEST
Verification process is crucial for DO-254 projects. Therefore, must be planned and executed with high scrutiny to provide assurance that the hardware implementation meets all safety requirements. Verification Plan together with PHAC are so important for safety, that must be submitted to the certification authority.
This webinar will guide the DO-254 applicants on how to plan the process to meet DO-254 objectives and satisfy FAA and EASA expectations for the certification process.
DO-254 Verification Basics
Test vs. Simulation
Plans and Standards
Janusz Kitel is a DO-254 Program Manager at Aldec. He is responsible for FPGA level in-target testing technology and requirements lifecycle management for DO-254 and other safety-critical industry standards. Janusz has 7 years of experience in requirements engineering and over 12 years of experience in product quality assurance. Janusz received his M.S. in Electronics and Telecommunication from Silesian University of Technology and increased his knowledge around software engineering from complementary studies at AGH University of Science and Technology (Poland). His practical engineering experience includes the areas of functional verification, DO-254 compliance and software development and he has held a wide range of engineering positions that include Application Engineer, Software Developer and Project Manager.
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