LIVE WEBINAR: CDC Verification Flow for OpenCores IP Design (US)
Presenter: Alexander Gnusin, Design Verification Technologist, Aldec
Thursday, November 16, 2017
11:00 AM – 12:00 PM PST
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Abstract:
OpenCores is a well-known open source hardware community for digital open source hardware designs. Many hardware designers have adopted OpenCores IP, hence, it is crucial that they are carefully verified during the IP selection process. One of the verification aspects is the Clock Domain Crossing (CDC) Signoff. In this webinar, we will demonstrate how to apply CDC verification on the OpenCores Ethernet MAC IP.
CDC verification requires design constraints for synthesis and static timing analysis. However, in most cases, OpenCores designs do not include these constraints. In this webinar, we will demonstrate a semi-automatic design constraint generation methodology with ALINT-PRO CDC efficient debugging flow. Using this flow, designers are able to reveal critical CDC issues while generating and verifying timing constraints for the current designs.
Agenda:
Presenter Bio:
Alexander Gnusin is a Design Verification Technologist with Aldec. He has accumulated 22 years of hands-on experience in various aspects of ASIC and FPGA design verification. His list of employers have included IBM, Nortel and Synopsys Inc.
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